Under the “Chip to Start-up (C2S) Programme”, the central government is seeking applications from 100 start-ups, MSMEs, R&D organizations and academia.
It aims to train 85,000 engineers in very-large-scale integration (VLSI) and embedded system design areas.
The C2S programme will result in the development of 175 ASICs (application-specific integrated circuits), IP core repository and working prototypes of 20 systems on chips (SoC), for a period of five years.
It will be a step towards leapfrogging in Electronics System Design & Manufacturing (ESDM) space by infusing the culture of SoC/System Level Design at the Bachelors, Masters and Research levels.